- Updated QEMU to v4.1.0-rc4 to pickup MPS2 AN521 / v8m functionality as well as RISC-V fixes
- Enabled aarch64 qemu target to be used for Cortex-R on Xilinx platform
- Updated RISC-V toolchain with fixes from https://github.com/riscv/riscv-gnu-toolchain
- Enabled 64-bit RISC-V toolchain, defaults to ilp32 so it can build RISC-V 32-bit code
- Deprecating the 32-bit RISC-V toolchain
- Pulled in openocd fix for CC13x2/CC26x2 platforms