This release was created by: tariqkurd-repo
Release of RISC-V ISA, built from commit c951fb7, is now available.
What's Changed
- fix misaligned cap mcause values in Sdext and Hypervisor by @tariqkurd-repo in #1290
Full Changelog: riscv-isa-release-a412a5d-2026-10-09...riscv-isa-release-c951fb7-2026-10-13