What's Changed
- riscv-unpriv: Fix up the description of Valid Tag by @guoren83 in #619
- add hybrid boot comment by @tariqkurd-repo in #620
- Proofreading and restructuring some sections for a better logical flow by @tariqkurd-repo in #622
- attempting to separate out code and data checks by @tariqkurd-repo in #624
- Add comment on PCC by @tariqkurd-repo in #625
- Minor consistency fixes in scss and cbld instructions by @francislaus in #637
- fix permission check wording to be unambiguous by @tariqkurd-repo in #634
- Addressing ARC Priv feedback by @tariqkurd-repo in #632
- Improve description of EF=0 and EF=1 cases for clarity. by @jonwoodruff in #641
- insn page tidy up by @tariqkurd-repo in #642
- add mtvecc note by @tariqkurd-repo in #640
- instruction page cleanup by @tariqkurd-repo in #645
- New pma fault by @tariqkurd-repo in #646
- tidy up xrefs, and spec MXR and HLVX by @tariqkurd-repo in #643
- remove exception checks from branches and jumps by @tariqkurd-repo in #644
- Clarify ADD/CADD behaviour by @tariqkurd-repo in #650
- tidy up removal of branch fault, and add note about invalid address fault by @tariqkurd-repo in #651
- tidy up exception reporting using tables by @tariqkurd-repo in #652
- JALR clarification by @tariqkurd-repo in #656
- exception reworking by @tariqkurd-repo in #654
- small fixes noticed when making the ACPERM PR by @tariqkurd-repo in #663
- add missing integrity check into ACPERM by @tariqkurd-repo in #662
- make integrity checks more consistent by @tariqkurd-repo in #666
- make redundant branch encodings reserved by @tariqkurd-repo in #668
- Bump docs-resources from
1d5bcd2to3a40e07by @dependabot[bot] in #671 - fix two typos by @tariqkurd-repo in #673
- tidying up by @tariqkurd-repo in #678
- Address latest round of unpriv ARC feedback by @arichardson in #675
- ASR is always from the PCC by @tariqkurd-repo in #676
- Use "y" in extension names instead of "cheri" by @arichardson in #680
- Drop virtual memory notes from unpriv atomics description by @arichardson in #682
- Drop note that branches can raise exceptions by @arichardson in #686
- Fix typo in attribute name by @arichardson in #688
- Fix values for CHERI PTE faults in mcause priority table by @arichardson in #683
- Fix incorrect operand name in SCBNDS description by @arichardson in #685
- Use YLEN instead of CLEN by @arichardson in #679
- remove stale notes by @tariqkurd-repo in #691
- CBO.INVAL checks PCC.ASR in decode, prioritised above Load/store exceptions by @tariqkurd-repo in #677
- XRET should take an illegal instruction if PCC.ASR is missing, instead of PCC fault by @tariqkurd-repo in #690
- Rename load and store instructions to use Y as the data type by @arichardson in #689
- Avoid using separate names for the CSRs by @arichardson in #681
- Move to using variables for mnemonics, and rename non load/store mnemonics by @tariqkurd-repo in #694
- tidy up priv extensions and abbreviate main name to RVY by @tariqkurd-repo in #693
- Clean up C chapter by @tariqkurd-repo in #696
- 16-bit shift encodings are not HINTs for RVY by @tariqkurd-repo in #695
- Use y-prefixed general purpose register names instead of c-prefix by @arichardson in #687
- resinstate Zabhlrsc encodings by @tariqkurd-repo in #698
- Tidy up RVC variables and tables by @tariqkurd-repo in #711
- IFC to zylevels extensions (#628) by @nwf in #631
- Fix suggested assembly syntax for ADDIY aka CADDI aka CIncOffsetImm by @jrtc27 in #713
- Fix column heading for Table 21. Encoding of architectural permissions for MXLEN=32 by @david-henley in #712
- add misa.y by @tariqkurd-repo in #710
- ISA renaming by @tariqkurd-repo in #700
- delete Zish4add, allocate new encodings for sh123add by @tariqkurd-repo in #715
- Define pseudoinstructions by @tariqkurd-repo in #714
- fix typos by @tariqkurd-repo in #719
- Small typo and xref fixes by @arichardson in #726
- Small fixes found while refactoring by @nwf in #725
- rename PCC to pc by @tariqkurd-repo in #724
- Fix YBNDSIW encoding conflict by @tariqkurd-repo in #720
- Rename YBNDSIW to YBNDSWI by @arichardson in #727
- change ACPERM to bit clearing by @tariqkurd-repo in #721
- massive operand renaming by @tariqkurd-repo in #728
- Fix incorrect description for JALR by @arichardson in #733
- Primordial, not Infinite, capabilities by @nwf in #731
- Fix permission compression with Zylevels1 by @nwf in #729
- remove VAR-XLEN option by @tariqkurd-repo in #736
- priv spec review by @tariqkurd-repo in #735
- 730 minor cleanups by @arichardson in #738
- define new ISA extensions by @tariqkurd-repo in #730
- Simplify hybrid mode chapter by @arichardson in #739
- rename execution modes by @tariqkurd-repo in #732
- use ctag variable by @tariqkurd-repo in #746
- tidy up atomic pages - no spec changes by @tariqkurd-repo in #747
- proofreading of Zylevels chapter by @tariqkurd-repo in #740
- Defined root caps should be unsealed by @nwf in #748
- Clean up instruction tables appendix by @arichardson in #744
- Move SH*ADDY from RVY base chapter to Zba by @arichardson in #749
- Drop separate names for M/S/H extensions by @arichardson in #750
- Priv spec proofreading by @tariqkurd-repo in #751
- Fix remaining misa xrefs text by @arichardson in #752
- Rework Svucrg extension to use a 3-bit PTE implementation. by @qwattash in #737
- Proofreading by @arichardson in #753
- More proofreading by @arichardson in #754
- Distinguish between capability values and variables (registers) by @arichardson in #755
- make Svucrglct more visible in the extension list by @tariqkurd-repo in #756
- textual improvements to PTE chapter by @tariqkurd-repo in #757
- More minor changes by @arichardson in #758
- capability encoding version CSR by @nwf in #709
- Bump docs-resources from
3a40e07to48beddbby @dependabot[bot] in #759 - Bump docs-resources from
48beddbtod7974eaby @dependabot[bot] in #764 - Remove Svy name by @tariqkurd-repo in #765
- replace Smyre with Zyhybrid for Privileged Architectures by @tariqkurd-repo in #763
- Refactor CLRPERM rules by @nwf in #742
- speccification vs extension, and some other minor tidy-up by @tariqkurd-repo in #766
- More proofreading by @arichardson in #761
New Contributors
- @guoren83 made their first contribution in #619
- @jonwoodruff made their first contribution in #641
- @david-henley made their first contribution in #712
- @qwattash made their first contribution in #737
Full Changelog: riscv-isa-release-daebb9d-2025-05-23...riscv-isa-release-3673a10-2025-09-05