Added
- Add source- and destination-clock-domain "halves" for the clock domain crossing (CDC):
axi_cdc_srcandaxi_cdc_dst. This is implemented by refactoring theaxi_cdcmodule, so the
implementation is reused from the existingaxi_cdcmodule. To avoid code duplication,axi_cdc
now instantiates anaxi_cdc_srcconnected to anaxi_cdc_dst.
Changed
axi_lite_to_apb: Make pipeline registers on request and response path optional (can be enabled
with the newPipelineRequestandPipelineResponseparameters), and disable those pipeline
registers by default.
Fixed
axi_demux: Improve compatibility with new version of QuestaSim's optimizer (vopt) (#169).
Before this workaround, QuestaSim 2020.2 and 2021.1 could segfault on instances ofaxi_demux.