This is a patch release containing the following changes to v2.7.2:
- Fixed segfault in int8 convolution with binary post-ops on Intel CPUs (c8d40c0)
- Applied workaround for tanh post-op on some Xe architecture based GPUs (3eb3267)
- Disabled fp16 post-ops with Compute Library for Arm Architecture (ACL) (f7b7dc0)
- Fixed incorrect results for sequence of eltwise post-op with same algorithm but different parameters (02c2678, 1c36e27, 81ba0fe)
- Fixed issue in convolution with groups and plain activation layout on Intel GPUs (df6f2e3, d0c14c2)
- Fixed reorder failures on Xe HPC architecture based GPUs (c3cb1d5)
- Fixed thread safety issue in convolution primitive (2955c9d)
- Fixed scratchpad allocation issue in matmul (989acd3)
- Disabled concat batching with scales on Intel GPUs since implementation doesn't support it yet (8aab73f, 1eac450, 82838de)
- Fixed segfault and correctness issues in convolution primitive with sum and relu post-ops on Intel CPUs (fc335be, 0f4697a, 60f1727, d28f2c1, 4761ee9, f674fbf)