intel/intel-graphics-compiler igc-1.0.9933 on GitHub

Fixed Issues / Improvements

Tighten legalization rules for EU fusion platforms
Extend VC shader dumps to include more DebugInfo-related information
Add runtime symbol "INTEL_PATCH_CROSS_THREAD_OFFSET_OFF_R0" in ZEBIN.
Add option for disabling extra coalescing in VC backend
Add symbols of function declarations to ZeBin
Add EU fusion feature to appropriate targets.
Add support of SPIRV floating point mad via CMCL in VC
Add GenXPredRegionLowering pass
Add debug info support for global variables.
Add tests for function groups construction
ZEBinary: add thread_scheduling_mode to execution environment
ZEBIN: Merge ZEINFO byval payload arguments when possible.
Add JointMatrixINTEL fill and slicing operations.
Remove emitting ld_lz when not supported
Better private memory estimate for indirect calls
Disable explicit creation of ISCCP by VC
Support KHR SPIRV Friendly IR for OpBitCount
IGA: ARF_ACC layout update and better tool help message
ZEBIN: Set ELF section flags for TEXT/DATA/BSS sections.
Disable constant coalescing for retry
Add Alchemist (aka ACM, DG2) & PVC related methods in Platforms.hpp
ZEBIN: Add source_offset to zeinfo payload argument.
Update SPV_INTEL_hw_thread_queries to latest version.
Respect fp32-correctly-rounded-divide-sqrt flag when Scalar IGC uses Khronos SPIRV Translator
Support KHR SPIRV Friendly IR for SPV_INTEL_media_block_io
Add support for exclusion of IR from zebin output
Temporary switch off preemption for ICLLP due to regressions
Mark invoke_simd targets with LTO_InvokeOptTarget attribute
Better private memory estimate for indirect calls
Expose vISA LTO options to IGC
do not reserve Sampler with IDX=0 when debuggability is enabled
Add DirectCallsOnly flag
Support implicit args buffer in CMImplParam
Add subtarget info memeber into GenXLoadStoreLowering pass
Support 32-bit addressing in Load Store Lowering
Enhance the preRA flag remat to sink trivial flag evaluation.
ZEBinary: must not generate const/global base implicit arguments
Address class pattern detected & removed later in IGC pass
VC should produce debuggable kernels by default
Detect uniform invoke_simd arguments
introduce VC controls for codegen optimization level
extend VC backend controls related to debuggability
More dumps available for GenXLiveness
Support printf strings section in zebin
Support for DPAS sizes in DPC++ joint_matrix for sizes 1, 3, 5, 7.
sginvoke: pass ESIMD text visa assembly in the input of SPMD compilation
Introducing DG2 and PVC support for VC
SWSB: Remove an unused field in SBBucketDesc.
SWSB: Set the correct LB and RB of ACC footprint on creation.

Full changelog: igc-1.0.9636...igc-1.0.9933

Dependencies revisions

Ubuntu 18.04 binary packages for LLVM11/Clang11 are included.