Fixed Issues / Improvements
- Process legalization of 64-bit moves on VC backend side.
- Renumber subroutines after removing unreachable code.
- Add enviroment variable for OCL debugging options.
- As urem needs positive operands, srcMod could generate negative operands. To be safe, disable srcMod for urem.
- The existing I64 shift emu had wrong result if shift amt is not in [31, 0]. The problem is that the inner condition was generated incorrectly.
- Passing context for code patching.
- Process legalization of 64-bit moves on VC backend side.
- Search for genx.output.1 intrinsics not only in return blocks (some execution paths may have callable instead).
- Fix for DumpToCustomDir flag and logic of ShaderDumpPidDisable flag on Linux.
- Fix: Wrong pattern is matched in GenSpecificPattern.
- Add support for SPV_INTEL_long_constant_composite.
- Process legalization of 64-bit moves on VC backend side.
- Use simple token allocation algorithm in debug mode.
- Disable stateless to stateful promotion after 32 promotion.
- Adding /Ob3 inline expansion option to 64-bit release config for agressive inlining within IGC.
- Fix coalescing of output arguments after migration to genx.output.1 intrinsic.
- Support for SPV_EXT_shader_atomic_float_add extension.
- Guard the FC patch SWSB info generation to save compilation time
- When a byte is promoted to word, its signedness should remain unchanged.
- Temp WA to limit kernel name length
- Initialize address register for indirect addressing if shader has indirect resources accesses i.e. a0 is used in send descriptor.
- Add support for SPV_INTEL_fp_fast_math_mode in SPIRVReader.
- Address register initial support.
- Fix initialization of GenXTidyControlFlow
- Fix push constant threshold for CFL GT3.
- When a byte is promoted to word, its signedness should remain unchanged.
- Fixed performance issues with subroutine inlining heuristic.
- Move block push constants threshold setting from being the default IGC flag value to CPlatform.
- Remove -hasRNEAndRenorm and its associated code.
- int64 mul does not support srcMod
- Refactored some conditions to make the source code more idiomatic and easier to read.
- Change of stateless indirect access reporting mechanism.
- Prevent unnecessary copies generation on GenXCoalescing.
- Extract code that adds Compute Shder CodeGen passes to a separate function.
- Change return type of createWrRegion and small refactoring in GenXBaling
- Hybrid RA with spill
- Maintain physical pred/succ during CFG BB insert/delete.
- RA compilation time--remove unnecessary operations build inteference with local RA.
- Workaround for sampler feedback bug.
- Optimization for signed scalar division for constant power of 2 int as divided.
Dependencies revisions
- intel/llvm-patches@9cbc7cf
- intel/opencl-clang@c8cd72e
- KhronosGroup/SPIRV-LLVM-Translator@424e375 (for opencl-clang)
- intel/vc-intrinsics@5032643
- KhronosGroup/SPIRV-LLVM-Translator@ab5e12a (for VectorCompiler)
- llvm/llvm-project@llvmorg-10.0.0
Ubuntu 18.04 binary packages for LLVM10/Clang10 are included.