github intel/intel-graphics-compiler igc-1.0.5176

latest releases: igc-1.0.15610.11, igc-1.0.15770.10, igc-1.0.15770.9...
3 years ago

Fixed Issues / Improvements

  • Enabling inlining for -O0 to preserve debug info.
  • Replace libclc cospi and sinpi implementations with svml versions.
  • -cmc options to work the same way as -vc-codegen
  • Add a separate constant buffer for string literals in ZeBin path.
  • Several improvements to computation of ranges in debug_loc section.
  • Fix for comparison of ConstantDataSequentials when comparing constants
  • Enhance function pointers support in VC.
  • Fixed sporadic failures due to uninitialized variable.
  • Open-source svml cos/sin/sincos functions, which will be used when input's absolute value is less than 10000. Otherwise libclc implementation will be used.
  • Fix capability string in SPIRV reader to be conformant with spec.
  • Fix dominance corruption in SIMD CF Conformance
  • Fix fmax builtin conversion
  • Fix for select condition checker in SIMD CF Conformance
  • Add support for GenISA_simdBlockRead and GenISA_simdMediaBlockWrite GenISA intrinsics in Emu64OpsPass. This fixes the crash in IGC when compiling kernels with intel_sub_group_block_image_long for ICL platform.
  • Fix building for LLVM11
  • Add helper function to get image type from KernelArg (NFC)
  • Check for illegal VxH operands (<1,0> with exec size 32) in vISA verifier.
  • Fix wrong expected usage in genx wrapper
  • Remove split of cmp instructions in CISACodeGen as it is now handled by vISA.
  • CMABI is added to the list of VC passes in the plugin
  • Changes in preparation of LLVM 11 upgrade.
  • Fix for missing metadata for cloned functions
  • Fix building for LLVM11 (next part)
  • Update configuration_flags.md
  • Fix a bug where uniform vector broadcast was handled incorrectly on platforms without i64 support.
  • Default stack call and indirect call to compile SIMD16
  • Prepare constant loader to use data layout
  • Adding platform info to FCL interface
  • Add support of llvm text files for GenXWrapper
  • Align privatebase to 10 bits and explicitly tell InstCombiner the alignment of perThreadOffset and bufferOffset to avoid limitation of MaxDepth==6
  • simd-1 kernels shall allocate SIP surface if debug info is present
  • avoid emitting several visa indices for llvm instruction
  • Removed clang block type arguments from precompiled builtins in BiFModule.
  • Fix the Klock reported issue in linear scan RA
  • .elf with debug info can be dumped with ShaderDumpEnable
  • Fix translation of SPIRV DebugValue operation when first argument is OpConstant.
  • Add support for more opcodes in SPIRV to create DIExpression.
  • optimize the compilation time of linear Scan RA
  • Improved loadPhiConstants to handle bitcast chains
  • Remove split of arithmetic instructions in CISACodeGen as it is now handled by vISA.
  • Add current BB to HW conformity and make more use of replaceDst()
  • Add dump function to CVariable to assist debugging (NFC).
  • Swap src0 and src1 for pseudo-mad if src1 is scalar but src0 is not.
  • Avoid FP64 emulation related code if kernel doesn't use FP64 at all, second try.
  • Turn on writing caller's frame-pointer to callee's stack. Enable flag EnableWriteOldFPToStack to support stack-walk.
  • Remove split of logic instructions in CISACodeGen as it is now handled by vISA.
  • Add possibility to use ninja cmake-generator
  • Improved baling of new load insts
  • GetGenxDebugInfo should be a constant method
  • Add support of specializaton constants to VC
  • Pattern match for canonical predicate of an icmp instruction with negation.

Dependencies revisions

Ubuntu 18.04 binary packages for LLVM10/Clang10 are included.

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