Fixed Issues / Improvements
- Removed SIMD size dependence on -g. SIMD size is an optimization so it is dependent on whether optimizations are enabled.
- Removed the code related to replacing unreachable instructions with "return undef".
- Added an analysis to check if an instruction's def reaches the end of its parent basic block.
- Added Vector Compute backend
- Added build option, vISA_noStitchExternFunc, to control the stitching policy.
- Added extra condition for transforming ptr-arg.
- Fixed defect where 32word and 64word in align directives failed parse.
- Fixed DILocation for globals that are localized.
- Fixed payload coalesing missing issue for dual-source RTW on SIMD16.
- Move Accumulator substitution into its own file.
- Skipping marking source variables with Output attribute.
- CISA assembly update.
- SWSB improvements.
- Avoiding div by zero while doing spillCost computations.
- Write to null register when inlineAsm output is unused.
- Enhance stateless simple push to allow promoting regions where the starting address can be a sum of 2 runtime values.
- Increase the maximum size of arguments that can be passed to OpenCL kernel to 2 KB.
- Optimize double precision SQRT instruction.
- Do not include zero-sized variable (e.g., Arg/Retval when there's no stack call) in global RA.
- Do explicit var split for local live-ranges only.
- Support vector type for llvm.copysign
- Protecting ISA generated variables from conflicting with vISA keywords (vISA reserved words are suffixed with _ (iteratively)).
- Set push constant mode to gather if the driver only supports gather.
- DWARF debugger location expressions fixes.
- Turn off writing caller's frame-pointer to callee's stack. Since this feature is needed only for stack-walk, we can turn it off by default with compiler flag: EnableWriteOldFPToStack.
Ubuntu 18.04 binary packages for LLVM10/Clang10 are included.