Fixed Issues / Improvements
- Fix get_sub_group_id builtin handling
- Remove unused GTPin vISA option
- Further refactoring of vISA attributes
- vISA will use dispatch SIMD size from an attribute instead of scanning all instructions
- Fix to handle a infinite loop stuck issue leading to compilation hang
- Fix the performance regression caused by scalar suppression
- Refactor pixel shader code gen to avoid hard-coding SIMD size and GRF size
- Fix to SIMD16 shuffle down
- Add possibility to control partial component packing via shader metadata
- Fix sub_group_clustered_reduce_* on 64-bit types
- Extend LVN to detect more instructions
- Use attributes to get attributes names instead of hard-coding them wherever possible
- Added SimdSize kernel attribute (not used yet)
- Added sin/cos to sinpi/cospi optimization to improve performance
- Fixed the BCR static check
- Added getPlatform() function to IR_Builder and G4_INST
- Fixes in L0 tests
- Added vISA documentation
- Minor cleanup for G4_Declare
- Fixes for getAttributeID (searching all attributes instead of only kernels')
- Fix for subgroup_scan_exclusive for char and short
- Updated fcl interface to latest
- Added include guards, needed overrides, and some miscellaneous path fixes
- Added a debug knob to change the max block push constants threshold.
- Other minor bugfixes and improvements
Ubuntu 18.04 binary packages for LLVM10/Clang10 are included.