github has207/xenia-edge f6f9a03
xenia_edge

latest release: 95b14f5
4 hours ago

Changes

  • [CPU] Treat guest calls as reading all of CR (f6f9a03)
  • [CPU] Take the FPR denormal proof's edges from the branches themselves (39aa0bf)
  • [A64] Return in the Fpu mode the FPCR tracker assumes (8f21542)
  • [A64] Leave scalar moves, tests and exact conversions in the VMX mode (e0e1e58)
  • [A64] Assume the Fpu mode where the tracker loses it in scalar-only code (df7d6d9)
  • [A64] Keep the physical remap bound across tail stubs and blocks (1bb7afe)
  • [A64] Branch in one instruction when the whole function is in reach (0ffb0c2)
  • [A64] Branch on a compare's flags instead of its boolean (aba5703)
  • [A64] Store a call's return address from the register holding it (6bc0aa5)
  • [A64] Fold a vector access's alignment mask into its address (7a5d971)
  • [A64] Load the fixed helper addresses from the backend context (6fc16d1)
  • [A64] Cheaper call sequences and extern calls (b416d19)
  • [A64] Track the FPCR mode across blocks and host transitions (fc0ed6e)
  • [CPU] Eliminate dead condition-register stores with a liveness pass (689590b)
  • [CPU] Prove guest FPRs non-denormal across blocks (92bf749)
  • [CPU] Keep the lfs/stfs signaling-NaN fixups off the fast path (c496db0)
  • [CPU] Fold the single-precision denormal quirk test into one opcode (078a07b)

Full changelog: 089473c...f6f9a03

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