• Add ExtractLane, InsertLane, IsInf, IsFinite, IsNaN
• Add StoreInterleaved2, LoadInterleaved2/3/4, BlendedStore, SafeFillN
• Add MulFixedPoint15, Or3
• Add Copy[If], Find[If], Generate, Replace[If] algos
• Add HWY_EMU128 target (replaces HWY_SCALAR)
• HWY_RVV is feature-complete
• Add HWY_ENABLE_CONTRIB build flag, HWY_NATIVE_FMA, HWY_WANT_SSSE3/SSE4 macros
• Extend ConcatOdd/Even and StoreInterleaved* to all types
• Allow CappedTag<T, nonPowerOfTwo>
• Sort speedups: 2x for AVX2, 1.09x for AVX3; avoid x86 malloc
• Expand documentation
• Fix RDTSCP crash in nanobenchmark
• Fix XCR0 check (was ignoring AVX3 on ICL)
• Support Arm/RISC-V timers