github cms-sw/cmssw CMSSW_6_2_0_SLHC17

latest releases: CMSSW_14_2_X_2024-11-21-1100, CMSSW_14_2_NONLTO_X_2024-11-21-1100, CMSSW_14_2_MULTIARCHS_X_2024-11-21-1100...
10 years ago

Changes since CMSSW_6_2_0_SLHC16_patch1:

CMSSW_6_2_0_SLHC16_patch1...CMSSW_6_2_0_SLHC17

  • #5027 from @lgray: Add eta-dependent pt threshold to shashlik clusters reconstruction
  • #5024 from @lgray: Fix local covariances for shashlik reconstruction
  • #4907 from @ledovsk: Don't check Shashlik for abnormal pulses reconstruction
  • #4939 from @mark-grimes: Fix Shashlik reco customisation when validation not present simulation
  • #4921 from @dildick: Gem csc rpc integrated trigger update l1
  • #4916 from @alja: Port Fireworks changes from 7x to SLHC visualization
  • #4924 from @mark-grimes: Small Shashlik reco speed improvement reconstruction
  • #4911 from @vandreev11: HGCAL recogeometry fix for local (thus also global) x and y coordinates geometry
  • #4913 from @wmtford: Suppress ghost solutions for strip matched recHit simulation
  • #4908 from @bsunanda: Phase2-hgx22 geometry simulation
  • #4909 from @mark-grimes: Speed up Shashlik reconstruction at high pileup reconstruction
  • #4888 from @lgray: Shashlik Fixes -> re-add ECAL driven seeding + split off mustache photons reconstruction simulation
  • #4879 from @jbsauvan: L1 upgrade e/g: Add parameter to choose type of H/E cut l1 simulation
  • #4867 from @zhenbinwu: Turn off MET significance calculation in CaloMETs for SLHC reconstruction
  • #4896 from @mark-grimes: Fix error where a parameter was set for the wrong config reconstruction
  • #4869 from @mark-grimes: Also add EcalHitsEK to subdets, so that pileup is digitised simulation
  • #4870 from @boudoul: pixel aging at 300 / 500 fb-1 updated simulation
  • #4871 from @rovere: Vertex validation slhc16p1 dqm reconstruction simulation

CMSDIST Changes between Tags REL/CMSSW_6_2_0_SLHC16_patch1/slc6_amd64_gcc472 and REL/CMSSW_6_2_0_SLHC17/slc6_amd64_gcc472:

cms-sw/cmsdist@REL/CMSSW_6_2_0_SLHC16_patch1/slc6_amd64_gcc472...REL/CMSSW_6_2_0_SLHC17/slc6_amd64_gcc472

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