Highlights

This is a patch release with bug fixes and a few new additions.

Thanks a lot to all the new contributors helping with this release!

Python Bindings

• Python bindings on Linux load libcapstone.so now with the RTLD_DEEPBIND flag set.
  On some Linux systems this should limit the symbols' scopes to the library, instead of global ones.
  Useful for tools which have two different Capstone versions in their dependency tree.

Architectures

• Update M68k and add support for ColdFire ISA (Sponsored by RizinOrg)
• Extend M680X support to RS08 and HCS12X.
• RISC-V: Add reg_access to details.
• Add support for x86 MOVSXD instructions.
• x86 decoding uses lookup tables now to increase the overall speed.

What's Changed

• wasm: add missing error check in read_memoryimmediate() by @Oblivionsage in #2866
• Extend M680X support to RS08 by @historicattle in #2872
• Python binding: Removing xprint utility used in the tests in v6 branch by @Antelox in #2874
• Introduce a +noaliascompressed option to selectively enable none-aliasing for compressed instrcution only but leave aliasing for the rest of instructions by @moste00 in #2869
• riscv: remove extra RISCV_INS_INVALID by @12101111 in #2876
• update clang-format to 20 by @b1llow in #2883
• cs_disasm_iter: return early on zero-size input by @slate5 in #2886
• Fix stale values in the detail struct by @slate5 in #2881
• Add dependabot.yml by @Rot127 in #2884
• x86: correctly handle XACQUIRE/XRELEASE by @jxors in #2882
• fix: avoid strnlen() in cs_strndup for Mac OS X 10.5 portability by @Scottcjn in #2889
• Fix RISCV aliases by @slate5 in #2891
• Document the test boolean values. by @Rot127 in #2892
• x86: simplify REX prefix parsing by @jxors in #2885
• Fix sysreg registers in RISC-V and modify the header patcher to not crash if a header doesn't include all tags of a generated .inc file by @moste00 in #2894
• RISC-V: add reg_access and test its usages in C and Python by @moste00 in #2895
• RISCV: Fix operand detection (REAL/ALIAS) by @slate5 in #2897
• Coverity fixes by @Rot127 in #2901
• Update m68k by @b1llow in #2880
• Fix position of comments to not break const_generator.py by @historicattle in #2906
• Extend M680X support to HCS12X by @historicattle in #2898
• next: Speedup x86 decoding with the help of LUT tables by @trufae in #2908
• Implements load libcapstone.so with RTLD_DEEPBIND #2912 by @AGhebrea in #2913
• Replace cmake setup with manual steps to reduce dependencies. by @Rot127 in #2916
• Python: use setattr to rewire Cs.disasm to avoid type checking errors by @mrexodia in #2915
• Handle SStream overflow by truncating appends by @Rot127 in #2921
• RISCV: the Ventana vendor is missing in the API by @slate5 in #2917
• Fix UB of shift >63. by @Rot127 in #2922
• Add M68K ColdFire ISA support by @b1llow in #2927
• Fix AArch64 register-offset load/store memory operand access (#2802) by @DanielBotnik in #2929
• x86: Decode MOVSXD r32, r/m32 and MOVSXD r16, r/m16 by @0xradulf in #2930

New Contributors

• @Oblivionsage made their first contribution in #2866
• @historicattle made their first contribution in #2872
• @12101111 made their first contribution in #2876
• @slate5 made their first contribution in #2886
• @Scottcjn made their first contribution in #2889
• @AGhebrea made their first contribution in #2913
• @DanielBotnik made their first contribution in #2929
• @0xradulf made their first contribution in #2930

Full Changelog: 6.0.0-Alpha7...6.0.0-Alpha8