What's Changed
- Update riscv64 fenv.c initialization to fix warnings by @ViralBShah in #330
- Musl compatibility fixes for s390 and powerpc by @sertonix in #331
- Fix cmake error for 4.x by @HIllya51 in #333
- Bump actions/checkout from 4 to 5 by @dependabot[bot] in #335
- Bump actions/upload-artifact from 4 to 5 by @dependabot[bot] in #336
- Bump actions/checkout from 5 to 6 by @dependabot[bot] in #338
- Bump actions/upload-artifact from 5 to 6 by @dependabot[bot] in #339
- Bump actions/upload-artifact from 6 to 7 by @dependabot[bot] in #341
- Bump codecov/codecov-action from 5 to 6 by @dependabot[bot] in #342
- ci: add native ARM (Linux + Windows) and Intel macOS runners by @ViralBShah in #345
- ci: workflow hygiene (concurrency, timeouts, loongarch fold, mips64, fork-safe codecov) by @ViralBShah in #346
- riscv: Fix feholdexcept() by @AlekseyZhmulin in #324
- CI: add -Werror strict lane and an auto-discovered regression-test harness by @ViralBShah in #350
- ci: speed up Windows jobs by trimming the msys2 install by @ViralBShah in #354
- ci: make codecov coverage status informational by @ViralBShah in #358
- riscv: allow single-precision float ABI (lp64f / ilp32f) by @ViralBShah in #349
- Fix powl() returning NaN instead of +0 on extreme underflow (#334) by @ViralBShah in #351
- Make powl() thread-safe (#222) by @ViralBShah in #355
- Bump codecov/codecov-action from 6 to 7 by @dependabot[bot] in #359
- riscv64: Keep hard-float fenv functions private by @maleadt in #360
New Contributors
- @sertonix made their first contribution in #331
- @HIllya51 made their first contribution in #333
- @AlekseyZhmulin made their first contribution in #324
Full Changelog: v0.8.7...v0.8.8