Automated nightly build for community testing (unsigned).
Every download is named ARMSX2-nightly-DATE-COMMIT-PLATFORM, so builds
from different nights stay distinguishable after you have downloaded them.
- macOS arm64: macOS-arm64.tar.xz
- Linux arm64: Linux-arm64-4K-pages.AppImage on most distros, or the 16K one on Asahi Linux and other Apple Silicon kernels (run getconf PAGESIZE if unsure)
- Windows arm64: Windows-arm64.zip
- RetroArch on Linux arm64: Linux-arm64-libretro-core.tar.zst, a 4K-page build
- Bare-display kmsdrm handhelds: Linux-arm64-SDL-handheld.tar.zst, a 4K-page build (Rocknix and Batocera run compositors, so use the Qt AppImage there instead)
- Android: Android-arm64.apk, sideload it
- iOS: iOS-arm64.ipa, unsigned, sideload it
What's new
- Android: regenerate the PGO profile against this tree, and let generate mode run
- GS/HW: carry the blend-mix factor in the output alpha without dual-source blend
- GS/HW: split RGB_ONLY alpha test by channel without dual-source blend
- Translations: restore the pt-BR plural forms for the save-state delete count
- GameDB overlay: stop erasing upstream fixes the overlay never meant to drop
- GS: stop taking a voluntary RT feedback read where it costs a render pass
- GS: stop a screenshot ending a GS dump that is already recording
- Android: add a PINE toggle to Advanced settings
- PINE: listen on loopback TCP on Android
- GS: move the Mali r44p1 self-read gates into the driver-bug database
- GS: say what died when the host GPU device is lost
- GS/OpenGL: fall back per draw, not per primitive, when GLES has no barrier
- GS: derive fetch-orders-overlap where it cannot go stale
- Counters: mark the savestate poison-repair blocks DELETEME after 2026-12-01
- eerunner: add EERUNNER_EXITSTORM and EE cycle-hack knobs to liverun
- Counters: warn loudly when a counter baseline sits ahead of the clock
- EE/arm64: make recSafeExitExecution safe to call cross-thread
- Android: run autosave save and load state on the CPU thread
- eerunner: add --statereport, a field-level savestate timebase decoder
- Counters: fix u32 blowup when a counter baseline sits ahead of cycle
- Tests: cover mVU_FMACd in the clamp-mode digest probe
- EE: drop QFSRV's adjacent-source fast path
- Tests: pin the VU div unit against the console
- VU: RSQRT's zero over zero raised both causes and returned a zero
- VU: SQRT's Invalid missed a negative zero the same way RSQRT's did
- VU: RSQRT lost the square root's Invalid on a negative zero divisor
- Tests: pin RSQRT.S against the console's negative zero divisors
- EE: RSQRT.S lost the square root's Invalid on a negative zero divisor
- Tests: pin RSQRT.S against the console's exponent-255 divisors
- EE: RSQRT.S divided by the host's reading of the top binade
- Tests: run RSQRT.S behind a CTC1
- EE: RSQRT.S's cause bits were lost behind a resident FCR31
- Tests: pin the zero divisor's cause bit to the dividend
- EE: DIV.S left an earlier instruction's I and D standing
- EE: RSQRT.S raised D on every zero divisor
- Tests: point the guard-bit comments at eeGuardedAddSub
- Tests: draw the guard-bit operand streams by hand
- Tests: the guarded add/sub skip could not fire
- EE: the multiply predicate is one instruction, not three
- Tests: give the digest table a probe that compiles under vuClampMode:2
- mVU: stop re-clamping the product in two-step FMACs
- Tests: pin the ABI-17 digest row to the emitter, not to a fix that never landed
- EE: hoist an independent JR/JALR delay slot ahead of the jump
- EE: hold the JR/JALR target in a register across the delay slot
- Optimization: funnel the quad shift through TBL instead of memory
- Comments: stop calling a CPU tick a microsecond
- Optimization: wait on the address instead of spinning the pipeline
- Fix FPU.cpp: answer the settled operands without running a digit
- Fix FPU.cpp: carry the SRT digit as the masks its selector already produces
- Fix FPU.cpp: run the EE divide unit's digits instead of rounding a quotient
- Fix: decide the multiplier's deficit from the array, not from ft
- Fix FPU.cpp: the interpreter flushed underflowing add/sub results; silicon does not
- Fix FPU.cpp: model the EE divide/square-root unit's truncation law
- Measure: the EE's divide/square-root unit is not correctly rounded
- Fix FPU.cpp: the compares were the operand clamp's last caller
- CMake: Correct the -ffp-contract rationale: x86 contracts too
- Tests: VU MADDA/MSUBA against hardware, the VU FMAC rounds twice
- Fix: DIV.S and RSQRT.S, the last two ops holding the operand clamp
- Fix FPU.cpp: the interpreter clamped away the EE's top binade before every op
- Fix FPU.cpp: the interpreter's adder had guard bits the EE does not have
- Fix FPU.cpp: the interpreter took FCR31's O and U from a host Inf or denormal
- Fix FPU.cpp: SQRT.S of an exponent-255 operand, by scaling instead of clamping
- Fix FPU.cpp: SQRT.S raises invalid on -0 and negative denormals
- Tests: VU pipeline visibility, memory wrap and XGKICK wrap against hardware
- Tests: VU0 branch terminators, integer pipe, MAX/MINI and CLIP against hardware
- Tests: EE FPU overflow against hardware, the max is 0x7FFFFFFF, not FLT_MAX
- Tests: FCR31 O and SO against hardware, as tripwires
- Tests: assert cross-engine agreement across the console-capture corpora
- Tests: record the arm64 VU div-unit denormal-Q divergence, both pipes
- Tests: repair the dead ADD.S negative control, and make it self-verifying
- Tests: EE zero-divisor result against hardware, across the clamp modes
- Fix FPU.cpp: the interpreter's divide/sqrt unit rounds to nearest
- Tests: take the FCR31 O/U flag material out of the capture file
- Tests: record the arm64 COP2 macro divergences against the console
- Fix FPU.cpp: RSQRT.S rounds the square root to single before dividing
- Fix: DXSTG translates its tag instead of aiming a write-back at a host address
- Complete Brazilian Portuguese graphics translations
Full changelog: nightly-20260809...e509b17